Of course we start with the power supply, which is just a 7812
voltage regulator followed by an op-amp set to 6V to create a half
way supply voltage for the audio op-amp stages.
A 12V regulator seems to be too high for a battery fed
However, in real life, this proves not to be any problem, the RDF
works fine down to 12V input voltage.
There's two reasons why I decided not to run the RDF at a lower
1, I need around 5 volts to bias the FET in the automatic gain
control, so total supply voltage would have to be at least + and -
5V = 10V.
2, Below 10V the C-Mos IC family quickly loses some important
qualities, such as low on-resistance in the 4051 analog multiplexer/demultiplexer.
The heart of the RDF is the clock/timebase, made of a 4060B
It provides 4 address bits to address the LED driver, the digital
filter, and the antenna controller.
Note: there's a switch S1B called "antenna check" that will
put a 470nF capacitor parallel to the 100pF clock capacitor.
This slows down the clock dramatically to a level where you can
listen to all 4 antenna elements one after the other, to check for any defects.
There's a second switching contact S1A for this function in the input of
the data latch, which will be described further below.
The antenna driver consists of a 4556B 2x 4-bit
demultiplexer, of which only the first half is used for the antenna
With every increment of the clock the next output will be
activated. (active zero!)
These 4 outputs are all followed by a op-amp set up as an integrator,
and the R/C circuitry around these op-amps ensures a very soft
transition to the next antenna element.
A network of two resistors feeding the + inputs of the op-amps is
used to bias the op-amps; the voltage on the + inputs is determining
the output waveforms and therefore the resulting transition from one
to the next antenna.
This soft drive method produces less noise and less additional
mixing products than the commonly used hard switching.
Additionally, there's a substantial overlap period of time in which
two sequential antenna elements are active, resulting in even better
The actual switching is done with PIN-diodes or 1N4148 switching
See the antenna driver page for comments on that.
So now, we enter the diagram at another point:
The Audio Input is feeding the speaker first, and
additionally audio is fed into the first stage of the audio chain.
This first stage has a FET transistor in its feedback circuit, so it
can be used as a VCA (voltage controlled amplifier).
It offers about 20dB gain initially, down to less than 0dB on big input
The last audio stage drives the control loop which controls the VCA,
thus providing a fully automatic gain control.
This is quite important for normal operation; in existing designs
very small input signals will not give a stable reading, and signals
that are too big will clip in the last filter stages resulting in
serious bearing deviations. Therefore, the automatic gain control in
the PA8W Doppler is a valuable addition.
Then the audio is fed into the 8-stage digital filter, built
around a 4051B 8-bit analogue multiplexer/demultiplexer.
This filter connects 8 capacitors in sequence to a high impedance
point in the audio chain.
This sequence is controlled by the timebase, as is the antenna
rotation and thus the audio frequency.
So, in 8 following time parts of the audio period, 8 capacitors are
connected to the signal path sequentially.
That means that a constant audio signal exactly on frequency will
hardly be affected by the capacitors that will already have been
charged to the right voltage over some time. Only parts in the audio
that deviate from average will be reduced extremely because the
capacitors will have to be charged or discharged to the new value.
In fact, this filter resist to any change in the audio. Random
deviations will be reduced extremely.
In this way, this filter is reducing a lot of noise, reflections as
well as modulation on the tracked transmitter.
It wil only allow for slow changes to pass, such as a change in
direction of the transmitter.
Without a similar filter, the RDF would only work properly in
extremely clean situations, with no signal reflections and no
The digital filter Q is adjustable for the best possible
A high Q will provide best reduction of disturbances, but will yield
a rather slow response.
Short, pulse-like transmitter bursts will need a low-Q for the RDF
to be fast enough to catch the direction of the transmitter.
After the digital filter there's a double low pass filter
designed to polish the signal further until it is ready to be fed into the
Zero Crossing Detector which marks
a specific point in the audio every single antenna rotation.
This specific point does not have to be the right moment to light a
LED in the pelorus display:
All kinds of parameters, such as group delay in your receiver and
phase shift in the RDF low pass filter stages will
shift this point away from the truth,
so what we need is
some form of compensation, which can be used to calibrate the RDF in
the current setup.
Additionally, the zero crossing detector can be switched from normal
to inverting, giving an extra 180 degrees of direction change,
sometimes necessary for calibration.
The actual compensation/calibration is provided by the 555 timer.
Triggered by the zero crossing detector it prolongs the trigger
impulse by an adjustable amount of time.
At the end of this prolonged impulse the fast transition of its
output to zero triggers the next IC:
the 4042B Data-Latch.
When triggered, this 4042B copies the current address data to its
outputs, so it's "pointing" at the proper LED to light up.
(note there's a switch contact S1A in the trigger circuit of the data
latch, necessary for the "antenna check mode")
The latched address data is passed to the actual LED Driver, a 4051B
8-bit analogue multiplexer/demultiplexer.
Depending on the address data, It connects one single LED series
resistor to the correct LED feeding it with about 7mA of current.
As the 4051B has only 8 outputs, it can only drive 8 LED's, so I divided
the 16 LED's in two rows of 8.
The anodes of a row of LED's are all connected to a PNP
transistor which is driven by the most significant bit of the
The other row is driven the same way by the complement of that
MS-bit, so always only one row is being activated.
I picked a 4051 for this task because a normal digital multiplexer
out of the 4000 family doesn't provide the necessary 7mA output
current to drive the LED's.
Whether you use PIN diodes or the 1N4148, the performance of the RDF
will hardly be degraded by these components.
Both types work fine in my arrays.